RISC-V, the open standard instruction set architecture (ISA) alternative to Intel and ARM, held its first European summit on 5 to 9 June 2023 in Barcelona.
Originally developed in 2010 at University of California, Berkeley, Risc-V is an open source hardware and software platform managed by RISC-V International, which is optimised for system on a chip (SoC) -based computers. The architecture is based on chiplets, which are components that can be packaged on a single chip to add the functionality required by a hardware designer. The RISC-V processor architecture comprises 50 reduced instruction set (Risc) instructions that run a full open-source software stack.
A new collaborative effort, the RISC-V Software Ecosystem (RISE) Project, has now been established to provide a way to accelerate the availability of software for high-performance and power-efficient Risc-V processor cores running high-level operating systems.
The RISE Governing Board includes Andes, Google, Intel, Imagination Technologies, MediaTek, Nvidia, Qualcomm Technologies, Red Hat, Rivos, Samsung, SiFive, T-Head, and Ventana.
Unlike ARM, AMD64 and Intel x64, Risc-V is an open project, which, says chair of the RISE Project Amber Huffman, means that there is no licence fee associated with using it, which streamlines collaborative industry efforts.
One example where open source hardware is coming together is Caliptra, a collaborative effort between AMD, Google, Microsoft, and Nvidia for hardware security. Announced in November 2022 at the Open Compute Project (OCP) summit. Caliptra is an open source root of trust (RoT) that produces cryptographic proofs about the hardware protections in place for confidential workloads. It provides a reusable open source, silicon-level block for integration into systems on a chip (SoCs), such as CPUs, GPUs, and accelerators.
Huffman said that RISE’s role is in technical project management, which supports the companies that are interested in collaborating to make the RISC-V software ecosystem better and commercially ready. To develop applications, software developers require low-level software and device driver software that communicate directly with the hardware platform.
Huffman said that this low-level software needs to be in place along with emulators and simulators before the hardware is available: “One thing that RISC-V International is doing is defining entirely new instruction set features. The challenge you have when somebody defines something brand new is that developers do not want to wait for two to three years or two years for the system on a chip to come out with the new feature in order to test it and write software.”
RISE aims to encourage the development of a robust software ecosystem specifically for application processors that includes software development tools, virtualisation support, language runtimes, Linux distribution integration, and system firmware, working upstream first with existing open source communities in accordance with open source best practices.
RISE Project members contribute financially and provide engineering talent to address specific software deliverables prioritised by the RISE Technical Steering Committee (TSC).
“As a global community, we have made tremendous progress in RISC-V adoption. We are grateful to the thousands of engineers making upstream contributions and to the organisations coming together now to invest in tools and libraries in support of the RISC-V software ecosystem,” said RISC-V international CEO Calista Redmond. “Accelerating adoption is our shared mission. The collective investment of our community and in the RISE Project will build on that momentum.”
Red Hat is one of the organisations on the governing board of RISE. Discussing the need to build out a software ecosystem for RISC-V, Steve Watt, head of Red Hat’s Office of the CTO, said: “Getting software right for RISC-V – and doing so using open source best practices – is well aligned with Red Hat’s corporate interests. We feel that RISE will enable RISC-V to extend into new markets and use cases.”
